Whereas TSMC formally began mass manufacturing of chips on its N3 (3nm-class) course of know-how late final yr, the corporate is about to lastly ship the primary income wafers within the present quarter. Throughout the newest earnings name with analysts and buyers, the corporate mentioned that demand for 3 nm merchandise was regular, and that quite a few designs for smartphones and high-performance purposes are incoming later this yr. Moreover, N3E manufacturing node is on observe for high-volume manufacturing later this yr.
“We’re seeing strong demand for N3 and we anticipate a powerful ramp of N3 within the second half of this yr, supported by each HPC and smartphone purposes,” mentioned C.C. Wei, chief government officer of TSMC, throughout the firm’s earnings. Name with monetary analysts and buyers.
Beforehand the corporate by no means commented on purposes that use its preliminary N3 fabrication course of, however for now it really disclosed that units which can be in mass manufacturing are designed for smartphones in addition to HPC purposes, which is a obscure time period which TSMC makes use of to explain every little thing from handheld recreation consoles all the way in which to heavy-duty smartphone SoCs.
For buyer privateness causes, TSMC doesn’t disclose which prospects are utilizing N3. Although traditionally, Apple has been TSMC’s alpha consumer for its modern course of applied sciences, so that they’re the most probably candidate to be the largest client of TSMC’s N3 output.
TSMC’s baseline N3 node (aka N3B) is an costly know-how to make use of. It options as much as 25 EUV layers (in response to China Renaissance and SemiAnalysis) with TSMC utilizing EUV double-patterning on a few of them to make for increased logic and SRAM transistor density than N5. EUV steps are costly on the whole, and EUV double patterning drives these prices up additional, which is why this fabrication course of is just anticipated for use by a handful of consumers who will not be as involved in regards to the excessive expenditure required.
For individuals who are extra value delicate, there may be N3E, which might ‘solely’ use as much as 19 EUV layers and doesn’t use EUV double patterning. Excellent news is that TSMC expects to begin mass manufacturing on this node to This autumn 2023.
N3E has handed qualification and achieved efficiency and yield goal and can begin quantity manufacturing within the fourth quarter of this yr,” mentioned Wei.
Supply: TSMC
